1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a semiconductor device having a local interconnection layer and a method for manufacturing the same.
2. Description of the Related Art
As the size of electronic products such as mobile phones, video tape recorders (VTRs), and notebooks becomes smaller, the size of the semiconductor devices used in those electronic products also becomes smaller. As a result, in a process of manufacturing the semiconductor devices, the design rule used to control the size of the devices also becomes smaller.
In order to improve the electrical performance of a semiconductor device, a shallow junction is used as a source/drain region.
FIG. 1 is a sectional view of a semiconductor device having a conventional local interconnection layer. Referring to FIG. 1, an isolation layer 10, for example, a trench isolation layer, is formed in a semiconductor substrate 20. Subsequently, a gate pattern 16 is formed by a conventional method on an active region of the semiconductor substrate 20, which is defined by the isolation layer 10. Next, impurity ions are implanted into the semiconductor substrate 20, thereby forming a junction layer 12 on the semiconductor substrate 20 at both sides of the gate pattern 16. In general, the junction layer 12 is a shallow junction layer. Subsequently, an interlayer dielectric (ILD) layer 22 is formed to be thick on the entire surface of the semiconductor substrate 20 on which the junction layer 12 is formed and on the isolation layer 10. Then, part of the ILD layer 22 is etched to form a contact hole. Finally, a local interconnection layer 14 is formed filling the contact hole.
However, according to a conventional method for manufacturing a semiconductor device, the isolation layer 10 is etched when forming the local interconnection layer 14. The isolation layer 10 is etched to be deeper than the junction layer 12. In such a case, leakage current occurs in a direction A shown in FIG. 1, resulting in lowering the electrical characteristics of the semiconductor device.
The reason the isolation layer 10 is etched to be deeper than the junction layer 12 is as follows. First, the junction layer 12 becomes thinner while a semiconductor device is formed. The contact hole for forming the local interconnection layer 14 is formed by a dry etch process. However, it is very difficult to form the contact hole having a depth shallower than the junction layer 12 by finely adjusting the etch selectivity. Thus, the isolation layer 10 is etched to be deeper than the junction layer 12.
The electrical performance of a semiconductor device is lowered by the leakage current, and leakage current is a factor that lowers the yield of a process of manufacturing a semiconductor device.